Among the various port specifications, the high-speed transmission speed is as high as 10G or more, so the parasitic capacitance requirements for the protection components are relatively strict, and must be below 0.1pF. The ultra-low capacitance STD (0R05) developed by SFI is ultra-low Capacitance (0.05pF) components can be applied to the ultra-high-speed transmission interface to protect the circuit from problems caused by electrostatic damage.
Main applicable series: STD
超低電容靜電抑制器的主要架構是有二個印刷電路板(PCB)，一個絕緣框(Epoxy)， 二個T型內電極所組成。絕緣框位於二個印刷電路板之間，形成內部有一個空腔的主結構， 在此製作方法，可以調整絕緣框的厚度來調整不同印刷電路板的相對距離，進而調整靜電抑制器的觸發電壓， 利用設計好的放電路徑方式來將靜電能量加以宣洩進行抑制。
The I-V curve is shown in the figure above. The current range drawn by this curve is 10-8~40A , and the voltage change is observed within this current range. Three areas can be roughly marked on this figure, the working voltage region, breakdown region and high current region.
In the working voltage area, the leakage current is very low at this time, only about 10-8~2x10-7A level, and the power consumption is quite low.
The surge voltage exceeds a critical point, the product will be breakdown, the surge current can be rapidly connected to ground, the parallel voltage is suppressed to a relatively low level, and this voltage is called the clamping voltage.
如果STD始終工作在Working Region、Breakdown Region區，器件可以長時間保持原有特性，即有很長的壽命，但如果經常工作於High current Region區，過大的電應力和熱應力，會影響器件的內部，導致電氣性能的劣化，
